Boolean Circuits & Formulas
Still in preparation. Please check the references at the end of the document.
A boolean circuit is a directed acyclic graph (DAG) with the following properties:
- each vertex corresponds to a gate, and there are 4 types of gates: input gates, AND gates, OR gates, and NOT gates.
- an input gate has no incoming edges and it is labeled by a (boolean) variable.
- an AND gate (also known as a conjunction, denoted by $\wedge$) has two incoming edges, and outputs 1 iff both inputs are 1.
- an OR gate (also known as a disjunction, denoted by $\vee$) has two incoming edges, and outputs 1 iff at least one input is 1.
- a NOT gate (also known as a negation, denoted by $\neg$) has exactly one incoming edge, and outputs 1 iff the input is 0.
Each gate in the circuit computes a boolean function in the natural way. Given a boolean function $f : \{0,1\}^n \to \{0,1\}$ and a circuit $C$, we say that $C$ computes $f$ if there is a gate of $C$ that computes $f$. In this case, we say that this gate is the output gate of $C$. (However, note that we could have multiple output gates in a circuit, in the event we want to compute functions over large codomains.)
For simplicity, when talking about boolean functions, given any circuit $C$, we will select one of the gates as the output gate and say that $C$ computes the function computed by this gate.
A boolean formula is simply a boolean circuit where the underlying (undirected) graph is a tree.
There are two important complexity measures associated with boolean circuits and formulas:
- the size of a circuit is the number of gates in the circuit.
- the depth of a circuit is the length of the longest path from an input gate to an output gate.
Remark: given any boolean circuit $C$, the number of input gates is determined by the circuit (the gates with in-degree $0$), and hence, if $C$ has $n$ input gates, then $C$ computes a function $f_C : \{0,1\}^n \to \{0,1\}$. This is the function computed by the output gate of $C$.
Definition 1: A circuit family is a sequence of circuits $C := \{C_n\}_{n \in \mathbb{N}}$ such that $C_n$ has $n$ input gates. We say that $C$ decides a language $L \subseteq \{0,1\}^*$ if for every $n \in \mathbb{N}$, we have $$ x \in L \cap \{0,1\}^n \iff f_{C_n}(x) = 1. $$
The size of a circuit family $C$ is the function $s_C : \mathbb{N} \to \mathbb{N}$ defined by $s_C(n) := \texttt{size}(C_n)$. The depth of a circuit family $C$ is the function $d_C : \mathbb{N} \to \mathbb{N}$ defined by $d_C(n) := \texttt{depth}(C_n)$.
The circuit (size) complexity of a language $L$ is the smallest size of a circuit family that decides $L$. The depth complexity of a language $L$ is the smallest depth of a circuit family that decides $L$.
Shannon’s Theorem
A basic result in circuit complexity is Shannon’s Theorem, which states that any boolean function $f : \{0,1\}^n \to \{0,1\}$ can be computed by a boolean circuit (of size at most $n \cdot (2^{n+1}+1)$).
Theorem 1 (Shannon’s Theorem): For every boolean function $f : \{0,1\}^n \to \{0,1\}$, there exists a boolean circuit $C$ of size at most $n \cdot (2^{n+1}+1)$ that computes $f$.
Proof: Note that any boolean function can be represented by its truth table, which has $2^n$ rows, as in the following example for the parity function on 3 bits:
| $x_1$ | $x_2$ | $x_3$ | $\bigoplus(x_1,x_2,x_3)$ |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |
Consider the following circuit $C$.
- The input gates are the variables $x_1, \dots, x_n$.
- add NOT gates computing $\neg x_1, \dots, \neg x_n$.
- to each row of the truth table for which the function value is $1$, add an AND gate that takes as input the variables $x_i$ or $\neg x_i$ according to the value of $f(x_1, \dots, x_n)$ in that row.
- add an OR gate that takes as input the outputs of the AND gates.
Note that the above construction has ANDs and ORs with more than 2 inputs, but we can always convert them to 2-input gates by adding additional gates (of the same kind). Note that an AND (equivalently OR) gate with $k$ input wires is equivalent to a sequence of $k-1$ input AND (equivalently OR) gates with 2 inputs each.
Thus, the size of the circuit $C$ is upper bounded by the number of wires in the above circuit, which is at most $n + 2^n \cdot (n-1) + 2^n$ (the number of NOT gates, plus the number of AND gates, plus the number of OR gates).
Remark: Note that in the above proof, we constructed a DNF (disjunctive normal form) formula for the function $f$. One can similarly construct a CNF (conjunctive normal form) formula for $f$.
Acknowledgements & References
This lecture was based on these resources:
- Lecture notes by Prof. Eric Blais.
- [S13, Chapter 9.3]