Satisfiability & Cook-Levin

Theorem 1 (circuits simulate TMs): Let $t, s : \mathbb{N} \to \mathbb{N}$ be functions. If a language $L \subseteq \{0,1\}^*$ is decidable by a TM $M$ that runs in time $t(n)$ and uses $s(n)$ space, then $L$ is decidable by a circuit family $C$ that has size $O(t(n) \cdot s(n))$ and depth $O(t(n))$.

Moreover, the construction of the circuit family $C$ can be done in time $O(t(n) \cdot s(n))$.

Proof: See written notes.

We are now ready to establish our first natural $\texttt{NP}$-complete language, and to prove the Cook-Levin Theorem. To do so, we need to introduce the following language:

Definition 1 (Circuit-SAT): The $\texttt{CIRCUIT-SAT}$ language is defined as follows:

$$ \texttt{CIRCUIT-SAT} := \{ \langle C \rangle \mid C \text{ is a satisfiable boolean circuit} \}. $$

where by a satisfiable boolean circuit we mean a boolean circuit $C$ such that there exists an assignment of the input variables that makes the output gate of $C$ output $1$.

We can use theorem 1 to show that $\texttt{CIRCUIT-SAT}$ is $\texttt{NP}$-complete.

Theorem 2: $\texttt{CIRCUIT-SAT}$ is $\texttt{NP}$-complete.

Proof: Membership in $\texttt{NP}$ is clear, since given a circuit $C$, a certificate is a satisfying assignment for $C$, and we can check in polynomial time if the certificate is correct by evaluating the circuit.

To show that $\texttt{CIRCUIT-SAT}$ is $\texttt{NP}$-hard, we will show a polynomial-time (Karp) reduction from any language $L \in \texttt{NP}$ to $\texttt{CIRCUIT-SAT}$. More precisely, we need to give a polynomial-time computable function $f : \{0,1\}^* \to \{0,1\}^*$ such that for all $x \in \{0,1\}^*$, we have $x \in L \iff f(x) \in \texttt{CIRCUIT-SAT}$.

Since $L \in \texttt{NP}$, there exists a poly-time TM $V$ and a polynomial $p : \mathbb{N} \to \mathbb{N}$ such that for all $x \in \{0,1\}^*$, we have

$$ x \in L \iff \exists y \in \{0,1\}^{p(|x|)} \text{ such that } V(x,y) = 1. $$

Let $f$ be the function that maps $x$ to the description of the circuit $C_x$ that simulates $V$ on input $x$ and certificate $y$. Since the TM $V$ runs in time polynomial on $|x|$, there is a polynomial $t : \mathbb{N} \to \mathbb{N}$ such that $V$ runs in time $t(|x|)$. In particular, $V$ also uses at most $t(|x|)$ space, and by theorem 1, we can construct a circuit $C_x$ that simulates $V$ on input $x$ and certificate $y$ using at most $t(|x|)^2$ gates and depth $t(|x|)$. Moreover, this construction can be done in polynomial time.

Note that $x \in L \Leftrightarrow \exists y \in \{0,1\}^{p(|x|)} \text{ such that } V(x,y) = 1 \Leftrightarrow C_x \text{ is satisfiable} \Leftrightarrow f(x) \in \texttt{CIRCUIT-SAT}$, as desired.

The language $\texttt{CIRCUIT-SAT}$ is a natural $\texttt{NP}$-complete language, but one could ask if we need to consider general boolean circuits, or if we could restrict our attention to a simpler class of circuits while preserving $\texttt{NP}$-completeness. The answer is affirmative, and we can consider the following language:

Definition 2 (3-SAT): The $\texttt{3-SAT}$ language is defined as follows:

$$ \texttt{3-SAT} := \{ \langle \phi \rangle \mid \phi \text{ is a satisfiable 3-CNF formula} \}. $$

where by a satisfiable 3-CNF formula we mean a 3-CNF formula $\phi$ such that there exists an assignment of the variables that makes $\phi$ true.

We can now prove the Cook-Levin Theorem, which states that $\texttt{3-SAT}$ is $\texttt{NP}$-complete.

Theorem 3 (Cook-Levin Theorem): $\texttt{3-SAT}$ is $\texttt{NP}$-complete.

Proof: It is clear that $\texttt{3-SAT}$ is in $\texttt{NP}$, since given a 3-CNF formula $\phi$, a certificate is a satisfying assignment for $\phi$, and we can check in polynomial time if the certificate is correct by evaluating $\phi$ on it.

To show that $\texttt{3-SAT}$ is $\texttt{NP}$-hard, we will show a polynomial-time (Karp) reduction from $\texttt{CIRCUIT-SAT}$ to $\texttt{3-SAT}$. Let $C$ be a boolean circuit, where $x_1, \dots, x_n$ are the input variables, and $g_1, \dots, g_m$ are the gates of $C$. The idea is to add extra variables to encode the computation of the circuit $C$ as a 3-CNF formula $\phi$.

Our formula $\phi$ will have the following structure:

• each gate of the circuit $C$ will be represented by a variable in $\phi$. Thus, we will have the variables $x_1, \dots, x_n$ representing the input variables, and $g_1, \dots, g_m$ representing the gates of $C$.
• We will add clauses to $\phi$ to ensure that the output of each gate is computed correctly. This is done as follows:
  • If $g_i$ is a NOT gate with input $u$, then we add the clauses $$ (g_i \lor u) \land (\overline{g_i} \lor \overline{u}). $$
  • If $g_i$ is an AND gate with inputs $u,v$, then we add the clauses $$ (\overline{u} \lor \overline{v} \lor g_i) \land (\overline{u} \lor v \lor \overline{g_i}) \land (u \lor \overline{v} \lor \overline{g_i}) \land (u \lor v \lor \overline{g_i}). $$
  • If $g_i$ is an OR gate with inputs $u,v$, then we add the clauses $$ (\overline{u} \lor \overline{v} \lor g_i) \land (\overline{u} \lor v \lor g_i) \land (u \lor \overline{v} \lor g_i) \land (u \lor v \lor \overline{g_i}). $$
• Lastly, we will add the clause $(g_m)$ to ensure that $\phi$ is satisfiable if and only if the circuit $C$ is satisfiable.

Remark: we can make sure that the formula $\phi$ is a 3-CNF formula (i.e., each clause has exactly 3 literals) by adding extra (dummy) variables and clauses to $\phi$. The main point is that each clause has at most 3 literals, and the construction can be done in polynomial time.

The above construction shows that $C$ is satisfiable if and only if $\phi$ is satisfiable, and hence $\texttt{CIRCUIT-SAT}$ reduces to $\texttt{3-SAT}$ in polynomial time.

Acknowledgements & References

This lecture was based on these resources:

• Lecture notes by Prof. Eric Blais.
• Lecture notes by Prof. Eric Blais.
• [S13, Chapter 9.3]