Virtual Memory Management in the VAX/VMS Operating System

What kind of paper is this?

• Reports on a specific system.

Vax Architecture

• Addresses are 32 bits.
  • 2 bits of segment (called spaces)
  • 21 bits of page number
  • 9 bits of offset (512 byte pages)
• Note that there are A LOT of pages per segment. This means that page tables are large. We are used to thinking of page tables as being contiguous in physical memory. This isn't feasible!
  • 21 bits => 2 M entries
  • At 2 bytes/entry, that's 4 MB
  • There goes easy allocation!
• Protection information is kept per-page, not per segment.
• 32 bit PTE
  • 1valid bit
  • 4 protection bits
  • 1 modify bit
  • 5 bits for OS
  • 21 bits to identify physical address
• The four segments are allocated as follows:
  • 00: P0 (for process)
  • 01: p1 (for process)
  • 10: system
  • 11: unused
• The operating system lives in the system segment. It is always mapped into every process' address space.
• System page tables are allocated in contiguous physical memory.
• To avoid having to allocate page tables in contiguous chunks, user page tables are allocated in system virtual address space.
• The base/bounds pairs found in page tables for user processes are virtual addresses in the system segment.
• The result is a two-level scheme.

Vax Address Translation

User page tables are allocated contiguously in system virtual space.

This means they may not be contiguous in physical memory.

It also means you have an additional layer of indirection in order to perform address translation for user processes.

System Address Translation (just like IBM 370)

Process Virtual Address Translation

Vax Page Tables:

• How many memory references per access?
• Can't possibly keep all the tables in fast memory.
• Steps in VAX address translation:

1. Look up base/bounds pair for user segment.
2. Add base to page number to get a System Virtual Address which indicates where the user's PTE is.
3. Need to translate the System Virtual Address to physical address.
4. Find base/bounds for SVA (you know it's segment 00).
5. Concatenate base to page number (from 2) to get physical address of user PTE.
6. Go to physical memory using address from 5, read PTE.
7. Concatenate physical page from PTE to original offset.
8. This is the physical address of the data desired.

Problems:

• Can be costly! Multiple references per access.

Solution:

• Remember locality: processes don't randomly jump all over memory.
• They tend to access a lot of data over a small space and then move somewhere else.
• So, keep a collection of recently used page translations in fast memory and check there first.
• These tables are called translation tables or translation lookaside buffers.

Other Miscellania

• Traps are indirected through system region (allows you to easily change OK).
• Page Replacement:
  • process local LRU (one bad process doesn't thrash the rest)
  • Pager does clustering (reads a bunch of pages at once)
  • Pages are left on modified lists before writing; acts as a cache.
  • Page tables are not paged out (unless all entries are invalid)
  • Swapper is invoked by OS; transfers entire processes in/ out.

Support for REAL TIME

• Expand/contract p0/1
• Lock/unlock pages in the resident set
• Lock/unlock process in memory
• Create / map sections in address space
• Produce record of page faults.

3 main performance features:

• Page caching
• Clustering
• Process local replacement.