>1024 Byte Packets Transmitted
This statistic describes the number of good packets transmitted that are greater
than 1024 bytes in length, including CRC. If jumbo frames are enabled, this
counter also reflects jumbo frames (over 1522 bytes). This counter does not
include transmitted flow control packets.
>1024 Byte Packets Received
This statistic describes the number of good packets received that are greater
than 1024 bytes in length, including CRC. If jumbo frames are enabled, this
counter also reflects jumbo frames (over 1522 bytes). Packets counted in the
Missed Packet Count are not counted here. This counter does not include received
flow control packets.
128-255 Byte Packets Received
This statistic describes the number of good packets received that are 128-255
bytes in length, including CRC. Packets counted in the Missed Packet Count are
not counted here. This counter does not include received flow control packets.
128-255 Byte Packets Transmitted
This statistic describes the number of good packets transmitted that are 128-255
bytes in length, including CRC. This counter does not include transmitted flow
control packets.
256-511 Byte Packets Received
This statistic describes the number of good packets received that are 256-511
bytes in length, including CRC. Packets counted in the Missed Packet Count are
not counted here. This counter does not include received flow control packets.
256-511 Byte Packets Transmitted
This statistic describes the number of good packets transmitted that are 256-511
bytes in length, including CRC. This counter does not include transmitted flow
control packets.
512-1023 Byte Packets Received
This statistic describes the number of good packets received that are 512-1023
bytes in length, including CRC. Packets counted in the Missed Packet Count are
not counted here. This counter does not include received flow control packets.
512-1023 Byte Packets Transmitted
This statistic describes the number of good packets transmitted that are
512-1023 bytes in length, including CRC. This counter does not include
transmitted
flow control packets.
64 Byte Packets Received
This statistic describes the number of good packets received that are exactly 64
bytes in length, including CRC. Packets counted in the Missed Packet Count are
not counted here. This counter does not include received flow control packets.
64 Byte Packets Transmitted
This statistic describes the number of good packets transmitted that are exactly
64 bytes in length, including CRC. This counter does not include transmitted
flow control packets.
65-127 Byte Packets Received
This statistic describes the number of good packets received that are 65-127
bytes in length, including CRC. Packets counted in the Missed Packet Count are
not counted here. This counter does not include received flow control packets.
65-127 Byte Packets Transmitted
This statistic describes the number of good packets transmitted that are 65-127
bytes in length, including CRC. This counter does not include transmitted flow
control packets.
Alignment Errors
Counts the number of receive packets with alignment errors ( i.e. the packet is
not an integer number of bytes in length). In order for a packet to be counted
in this register, it must pass address filtering and must be 64 bytes or greater
(from <Destination Address> through <CRC>, inclusively) in length.
If receives are not enabled, then this register will not increment. This
register is valid only in MII mode during 10/100 Mbps operation.
Broadcast Packets Received Count
This statistic describes the number of good broadcast packets received.
Broadcast Packets Transmitted Count
This statistic describes the number of good broadcast packets transmitted.
Bus Clock Rate (Mhz)
PCI options: 33, 66
PCI-X options: 66, 100, 133
Indicates the adapter's bus speed.
Current IFS Value
This statistic displays the current IFS value.
Duplex Mode
1=Half, 2=Full
This statistic describes the current link duplex configuration. A one
indicates the adapter is configured to half duplex mode, and a two indicates
full duplex mode configuration. (These values were chosen to match the
usage of the FORCEDUPLEX keyword.)
Flow Control Mode
1=Rx, 2=Tx, 3=both
Indicates which flow control mode is being used by the adapter.
Flow Control Received Unsupported Count
This statistic describes the number of unsupported flow control frames that are
received. This counter will increment when a flow control packet is received
which does not match the adapter definition of a flow control packet. This
counter is not expected to increment.
Good Octets Received Count HI
This statistic, in conjunction with the Good Octets Received Count LO, makes up
a 64-bit counter that describes the number of good octets received. This
statistic reflects the upper 32 bits of the 64-bit counter and is incremented
each time the Good Octets Received Count LO has reached it maximum value and
wraps to zero. This counter does not include received flow control packets.
Good Octets Received Count LO
This statistic, in conjunction with the Good Octets Received Count HI, makes up
a 64-bit counter that describes the number of good octets received. This
statistic reflects the lower 32 bits of the 64-bit count. This counter does not
include received flow control packets.
Good Octets Transmitted Count HI
This statistic, in conjunction with the Good Octets Transmitted Count LO, makes
up a 64-bit counter that describes the number of good octets transmitted. This
statistic reflects the upper 32 bits of the 64-bit counter and is incremented
each time the Good Octets Transmitted Count LO has reached its maximum value and
wraps to zero. This counter does not include transmitted flow control packets.
Good Octets Transmitted Count LO
This statistic, in conjunction with the Good Octets Transmitted Count HI, makes
up a 64-bit counter that describes the number of good octets transmitted. This
statistic reflects the lower 32 bits of the 64-bit count. This counter does not
include transmitted flow control packets.
Good Packets Received Count (Any Length)
This statistic describes the number of good packets received of any legal
length. This counter does not include received flow control packets.
Good Packets Transmitted Count (Any Length)
This statistic describes the number of good packets transmitted of any legal
length. This counter does not include transmitted flow control packets.
Jumbo Frames Received
This statistic indicates the total number of Jumbo Frames (frames larger than
1522 bytes) received by the
adapter.
Jumbo Frames Transmitted
This statistic indicates the total number of Jumbo Frames (frames larger than
1522 bytes) sent by the adapter.
Line Speed (Mbps)
Displays the current line speed in Mbps.
Multicast Packets Received Count
This statistic describes the number of good multicast packets received. This
counter does not include received flow control packets.
Multicast Packets Transmitted Count
This statistic describes the number of good multicast packets transmitted. This
counter does not include transmitted flow control packets.
Network Link Status
0=Up, 1=Down
This statistic describes the current link status of the adapter. A zero
indicates the link is up and a one indicates that link is down.
PCI-X Mode
0=PCI 2.2, 1=PCI-X
Indicates which type of slot the adapter is inserted. This counter does not
accurately indicate the bus type, therefore you should ignore it.
Receive Fragment Count
This statistic describes the number of received packets that were less than
minimum size (64 bytes) but had a bad CRC.
Receive Jabber Count
This statistic describes the number of received packets that were greater than
maximum size (1522 bytes) but had a bad CRC.
Receive No Buffers Count
This statistic describes the number of times that packets were received when
there were no available buffers in host memory to store those packets. The
packet will still be received if there is space in the hardware FIFO. This
counter does not include received flow control packets. Increasing Rx
Descriptors on the command line during load could result in this counter
incrementing less frequently.
Receive Oversize Count
This statistic describes the number of received packets that were greater than
maximum size (1522 bytes) and had a valid CRC.
Receive Undersize Count
This statistic describes the number of received packets that were less than
minimum size (64 bytes) and had a valid CRC.
Rx Carrier Extension Errors
This statistic counts the number of packets received in which the carrier
extension error was signaled across the GMII interface. The PHY propagates
carrier extension errors to the MAC when an error is detected during the carrier
extended time of a packet reception. This statistic will only increment if
receives are enabled, and the device is operating at 1000 Mbps.
Rx Checksum Error Pkts
This statistic describes the number of receive packets with bad checksums
calculated. This statistic will increment only on Intel 82543-based
gigabit adapters (Intel PRO/1000 F, PRO/1000 T server adapters). The hardware still
calculates checksums even when XSUMRX is not specified, so this will increment
whenever IP is used.
Rx Checksum Good Pkts
This statistic describes the number of receive packets with good checksums
calculated. This statistic will increment only on Intel 82543-based
gigabit adapters (Intel PRO/1000 F, PRO/1000 T server adapters). The hardware
still calculates checksums even when XSUMRX is not specified, so this will
increment whenever IP is used.
Rx CRC Error Count
This statistic describes the number of receive packets with CRC errors. Packets
less than 64 bytes are not counted in this statistic.
Rx DMA Too Early
This statistic counts the total number of times that the device attempted to
perform an Early DMA operation (by speculatively requesting the host bus prior
to reception of the entire packet), and ran out of data to DMA before the device
was forced to relinquish ownership of the bus. This condition is really not an
"error" condition, but is nevertheless counted for diagnostic purposes. This
statistic is invalid unless Early Receives are enabled.
Rx Error Count
This statistic counts the number of packets received in which I_RX_ER was
asserted by the PHY. In order for a packet to be counted in this register, it
must pass address filtering and must be 64 bytes or greater (from
<Destination Address> through <CRC>, inclusively) in length. If
receives are not enabled, then this register does not increment. In TBI mode,
this register will increment on the reception of /V/ codes.
Rx Length Error Count
This statistic describes receive length error events. A length error
occurs if an incoming packet is undersized (less than 64 bytes) or oversized
(greater than 1522 bytes, excluding Jumbo Frames, if enabled).
Rx Missed Packets Count
This statistic describes the number of missed packets. Packets are missed when
the hardware receive FIFO has insufficient space to store the incoming packet.
This could be caused because of too few buffers allocated, because there is
insufficient bandwidth on the IO bus, or because insufficient number of pause
frames for flow control are sent (82544-based adapters only). These packets will
also be counted in the Total Packets Received counter as well as in Total Octets
Received. To attempt to lower the number of missed packets, add the following
parameters at the end of the first load ce1000 command (This may be in the
autoexec.ncf or typed in manually at the end of the command).
Highwm=0x8008 Lowwm=0x8000 Pausetime=0X2000
Rx Sequence Error Count
This statistic describes receive sequence error events. This statistic will
increment along with the Rx Symbol Error Count when the fiber cable is either
disconnected or the connector is not seated completely.
Rx Symbol Error Count
This statistic describes the number of symbol errors between reads. The
count increases for every bad symbol received, whether or not a packet is
currently being received and whether or not the link is up. This statistic
will increment along with the Rx Sequence Error Count when the fiber cable is
either disconnected or the connector is not seated completely. Also,
during driver load, this statistic will increment minimally.
Slot Width (32 or 64 bits)
Determines the width of the PCI bus.
Total Octets Received HI
This statistic, in conjunction with the Total Octets Received LO, makes up a
64-bit counter that describes the total number of octets received. This
statistic reflects the upper 32 bits of the 64-bit counter and is incremented
each time the Total Octets Received LO has reached its maximum value and wraps to
zero.
Total Octets Received LO
This statistic, in conjunction with the Total Octets Received HI, makes up a
64-bit counter that describes the total number of octets received. This
statistic reflects the lower 32 bits of the 64-bit count.
Total Octets Transmitted HI
This statistic, in conjunction with the Total Octets Transmitted LO, makes up a
64-bit counter that describes the total number of octets transmitted. This
statistic reflects the upper 32 bits of the 64-bit counter and is incremented
each time the Total Octets Transmitted LO has reached it maximum value and wraps
to zero.
Total Octets Transmitted LO
This statistic, in conjunction with the Total Octets Transmitted HI, makes up a
64-bit counter that describes the total number of octets transmitted. This
statistic reflects the lower 32 bits of the 64-bit count.
Total Packets Received
This statistic describes the total number of packets received. All packets are
counted here, regardless of their length, whether they are erred, or whether
they are flow control packets.
Total Packets Transmitted
This statistic describes the total number of packets transmitted. All packets
transmitted will be counted here, regardless of their length or whether they
are flow control packets.
Tx Defer Count
This statistic describes transmit defer events. A defer event occurs when the
transmitter cannot immediately send a packet due to the medium being busy either
because another device is transmitting, or the link is not up.
Tx DMA Underruns
This statistic counts the total number of transmit underruns seen by the
transmitter. An underrun occurs when the device starts transmission of data
before all of the data is DMAed to the packet buffer, and the transmission
process runs out of on-chip data before reaching the end of the packet.
This may occur when the wire is much faster than the host interface, and the
Early Transmit Threshold is set too low. This statistic is invalid unless
Early Transmits are enabled.
Tx Excessive Collisions Count
This statistic describes when 16 or more collisions have occurred on a packet.
This counter increments only if the device is in half-duplex mode.
Tx Late Collisions Count
This statistic describes collisions that occur after 64 byte times. This
counter increments only if the device is in half-duplex mode.
Tx Multiple Collision
This statistic describes the number of times that a transmitted packet
encountered more than one collision but less than 16. This counter increments
only if the device is in half-duplex mode.
Tx Single Collision Count
This statistic describes the number of times that a transmitted packet
encountered a single collision. This counter increments only if the device is in
half-duplex mode.
Tx Threshold
Displays the current value of the Early Transmit Threshold. The adapter
will start transmitting the packet when the specified number of quad-words has
been DMAed in from memory.
Tx TOTAL Collision
This statistic describes the total number of collisions seen by the transmitter.
This counter increments only if the device is in half-duplex mode.
Tx with No CRS
This statistic counts the number of successful packet transmission in which the
Carrier Sense input from the PHY was not asserted within one slot time of start
of transmission.
The PHY should assert Carrier Sense during every transmission. Failure to
do so may indicate that the link has failed, or the PHY has an incorrect link
configuration. This statistic is not valid in TBI mode, and is only valid
when the device is operating at full duplex.
XOFF Received Count
This statistic describes the number of XOFF packets received. XOFF packets can
occur when Flow Control is enabled and both the adapter and its link partner are
configured to use it.
XOFF Transmitted Count
This statistic describes the number of XOFF packets transmitted. XOFF packets
can occur when Flow Control is enabled and both the adapter and its link partner
are configured to use it.
XON Received Count
This statistic describes the number of XON packets received. XON packets can
occur when Flow Control is enabled, and both the adapter and its link partner are
configured to use it.
XON Transmitted Count
This statistic describes the number of XON packets transmitted. XON packets can
occur when Flow Control is enabled, and both the adapter and its link partner are
configured to use it.
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